In recent years, with size reduction in electronic devices, an all-solid state battery has been formed together with semiconductor devices on a semiconductor substrate. In such a semiconductor substrate, in some cases, ions which serve to charge/discharge a solid state battery, e.g. lithium ions, diffuse to the semiconductor substrate. When those ions having diffused in the semiconductor substrate reach semiconductor devices, there are possibilities that the characteristics of the semiconductor devices deteriorate or the semiconductor devices improperly operate.
Regarding such a battery mounted integrated circuit device as described above where semiconductor devices and a solid state battery are formed on the same semiconductor substrate, as a method for reducing an influence on the semiconductor substrate exerted by ions serving to charge/discharge the solid state battery, it has been proposed that a diffusion layer be formed by doping an N-type impurity into the semiconductor substrate directly under the solid state battery, and this diffusion layer be applied with a potential not lower than a potential of a positive electrode of the solid state battery (Japanese Laid-Open patent Publication No. 2003-133420).
The diffusion layer applied with a potential not lower than the potential of the positive electrode of the solid state battery can prevent positive ions serving to charge/discharge the solid state battery, e.g. lithium ions, from diffusing into the semiconductor substrate. This can prevent the ions serving to charge/discharge the solid state battery from causing deterioration in characteristics of the semiconductor devices and improper operations of the semiconductor devices.
However, in the configuration as described above, a contact resistance between the diffusion layer and an electrode for applying a potential increases when a potential higher than the potential of the positive electrode of the solid state battery is applied. In order to reduce this contact resistance, it is necessary to increase the concentration of the N-type impurity in the diffusion layer directly under the solid state battery.
When the area of the solid state battery occupied on the substrate is small, a region for the diffusion layer to be formed can be made small. This can decrease an amount of the N-type impurity required to increase the concentration of the N-type impurity in the diffusion layer. However, when the area of the solid state battery occupied on the substrate is large, the region for the diffusion layer to be formed increases. This leads to an increase in amount of the N-type impurity required for increasing the concentration of the N-type impurity in the diffusion layer. Further, with the increase in amount of the N-type impurity required, the time required for the formation of the diffusion layer also increases. As thus described, a problem of lowering the production efficiency may arise as the solid state battery formed on the semiconductor substrate becomes larger.
Accordingly, an object of the present invention is to provide a battery mounted integrated circuit device capable of effectively preventing deterioration in characteristics of semiconductor devices and improper operation of the semiconductor devices, without using a large amount of N-type impurity.